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| the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. mos integrated circuit pd168117a 7-channel h-bridge driver with a micro step functi on supporting pulse input data sheet document no. s17486ej1v0ds00 (1st edition) date published may 2005 ns cp(k) printed in japan 2005 description the pd168117a is a 7-channel h-bridge driver with a micro st ep function supporting pulse input that consists of a cmos control circuit and a mos output stage. it can reduce the current c onsumption and the voltage loss at the output stage compared with a conv entional driver using bipolar transistors, thanks to employment of a mos process. moreover, at the pd168117a, micro step control of 128 divisions can perform stepping motor drive by the pulse input, and motor can be driven by low noise and low vibration. the package is a 64-pin flga that helps reduce the mounting area and height. the pd168117a can be used to drive two stepping motors, or two dc motors and one coil. features ? seven h-bridge circuits employing power mos fet ? low-voltage driving v dd = 2.7 to 3.6 v v m = 2.7 to 5.5 v ? output on-state resistance: 1.0 ? typ., 1.5 ? max. (sum of top and bottom stage, ch1 to ch4, and ch7) 1.5 ? typ., 2.0 ? max. (sum of top and bottom stage, ch5 and ch6) ? pwm output (ch1 to ch6), linear output (ch7) ? output current data sheet s17486ej1v0ds 2 pd168117a 1. pin configuration (bottom view) package: 64-pin plastic flga (6 x 6) fil 1 fb 4 fb 3 fb 2 fb 1 out 1b v m12 out 1a pgnd 12 out 2b v m12 out 2a in 5a in 5b in 5b in 5b in 5b in 5b in 7a n.c. n.c. n.c. n.c. fil 7 r 7 fb 7 out 7a v m7 out 7b v dd lgnd cosc oe 1 clk 1 cw 1 oe 2 /in 3a in 7b sel 7 selv ref7 v ref7 out 3b v m34 v m34 out 3a pgnd 34 out 4b out 4a fil 4 fil 3 fil 2 clk 2 /in 3b cw 2 /in 4a out 6b out 6a pgnd 56 out 5a v m56 out 5b mode 4 /in 4b mode 3 mode 2 mode 1 in 6b in 6a 15 16 17 18 19 20 21 22 14 39 40 41 42 43 44 23 13 38 55 56 57 58 45 24 12 37 54 63 64 59 46 25 11 36 53 62 61 60 47 26 10 35 52 51 50 49 48 27 9 34 33 32 31 30 29 28 hgf edcba 8 7 6 5 4 3 2 8 7 6 5 4 3 2 1 1 cautions be sure to connect all of the pins which have more than one. data sheet s17486ej1v0ds 3 pd168117a 2. pin functions (1/2) pin no. pin name function 1 a1 n.c. ? 2 b1 lgnd logic block gnd pin 3 c1 v dd logic block power supply pin 4 d1 out 7b h-bridge 7 output pin b 5 e1 out 7a h-bridge 7 output pin a 6 f1 v m7 h-bridge 7 power supply pin 7 g1 fb 7 current detection re sistor connection pin 7 8 h1 n.c. ? 9 h2 out 3b h-bridge 3 output pin b 10 h3 out 3a h-bridge 3 output pin a 11 h4 pgnd 34 h-bridge 3, h-bridge 4 gnd pin 12 h5 v m34 h-bridge 3, h-bridge 4 power supply pin 13 h6 out 4b h-bridge 4 output pin b 14 h7 out 4a h-bridge 4 output pin a 15 h8 n.c. ? 16 g8 out 1b h-bridge 1 output pin b 17 f8 out 1a h-bridge 1 output pin a 18 e8 pgnd 12 h-bridge 1, h-bridge 2 gnd pin 19 d8 v m12 h-bridge 1, h-bridge 2 power supply pin 20 c8 out 2b h-bridge 2 output pin b 21 b8 out 2a h-bridge 2 output pin a 22 a8 n.c. ? 23 a7 out 5b h-bridge 5 output pin b 24 a6 v m56 h-bridge 5, h-bridge 6 power supply pin 25 a5 out 5a h-bridge 5 output pin a 26 a4 pgnd 56 h-bridge 5, h-bridge 6 gnd pin 27 a3 out 6a h-bridge 6 output pin a 28 a2 out 6b h-bridge 6 output pin b 29 b2 cw 2 /in 4a h-bridge 3, h-bridge 4 driving direct ion input pin/h-bridge 4 input pin a 30 c2 clk 1 h-bridge 1, h-bridge 2 clk input pin 31 d2 oe 1 h-bridge 1, h-bridge 2 output enable pin 32 e2 cosc chopping frequency setting capacitor connection pin 33 f2 fil 7 amplifier operation stabilizing filter connection pin 34 g2 in 7b h-bridge 7 input pin b 35 g3 selv ref7 ch7 reference voltage setup selection pin 36 g4 v ref7 ch7 reference voltage external input pin 37 g5 v m34 h-bridge 3, h-bridge 4 power supply pin 38 g6 fb 4 current detection re sistor connection pin 4 data sheet s17486ej1v0ds 4 pd168117a (2/2) pin no. pin name function 39 g7 fil 3 filter capacitor connection pin 3 40 f7 fb 2 current detection re sistor connection pin 2 41 e7 fb 1 current detection re sistor connection pin 1 42 d7 v m12 h-bridge 1, h-bridge 2 power supply pin 43 c7 fb 3 current detection re sistor connection pin 3 44 b7 in 6a h-bridge 6 input pin a 45 b6 mode 2 mode selection pin 2 46 b5 mode 1 mode selection pin 1 47 b4 mode 4 /in 4b mode selection pin 4/h-bridge 4 input pin b 48 b3 clk 2 /in 3b h-bridge 3, h-bridge 4 clk input pin/h-bridge 3 input pin b 49 c3 cw 1 h-bridge 1, h-bridge 2 dr iving direction input pin 50 d3 in 5b h-bridge 5 input pin b 51 e3 r 7 amplifier operation stabilizing resistor connection pin 52 f3 in 7a h-bridge 7 input pin a 53 f4 sel 7 ch7 excitation mode selection pin 54 f5 fil 4 filter capacitor connection pin 4 55 f6 fil 2 filter capacitor connection pin 2 56 e6 fil 1 filter capacitor connection pin 1 57 d6 in 5a h-bridge 5 input pin a 58 c6 in 6b h-bridge 6 input pin b 59 c5 mode 3 mode selection pin 3 60 c4 oe 2 /in 3a h-bridge 3, h-bridge 4 output enable pin/h-bridge 3 input pin a 61 d4 in 5b h-bridge 5 input pin b 62 e4 in 5b h-bridge 5 input pin b 63 e5 in 5b h-bridge 5 input pin b 64 d5 in 5b h-bridge 5 input pin b data sheet s17486ej1v0ds 5 pd168117a 3. block diagram out 3a v m34 out 3b pgnd 34 out 4a out 4b v dd out 2b v m12 out 2a out 1b sel 7 selv ref7 v ref7 out 1a pgnd 12 oe 2 / in 3a lgnd out 6b v m7 out 6a out 7b out 7a out 5b v m56 out 5a pgnd 56 clk 1 cw 1 mode 1 cosc current sense 4 current sense 3 current sense 1 current sense 2 ch4 h-bridge ch3 h-bridge ch6 h-bridge ch7 h-bridge osc clk 2 / in 3b cw 2 / in 4a mode 4 / in 4b fb 1 fil 1 fil 2 fb 2 mode 3 oe 1 mode 2 in 7b in 7a in 6a in 6b in 5a in 5b fil 3 fil 4 fb 3 fb 4 fb 7 fil 7 r 7 control and pre-driver tsd 200 mv uvlo v ref7 ch1 h-bridge ch2 h-bridge ch5 h-bridge ch1/ch2 control ch3/ch4 control data sheet s17486ej1v0ds 6 pd168117a 4. standard connection example m m 10 k ? 1 ? 10 k ? 150 pf ex. 150 mv 3 to 5 v 22 f out 3a v m34 out 3b pgnd 34 out 4a out 4b v dd out 2b v m12 out 2a out 1b sel 7 v ref7 selv ref7 out 1a pgnd 12 oe 2 / in 3a lgnd 3 v out 6b v m7 out 6a out 7b out 7a out 5b v m56 out 5a pgnd 56 clk 1 cw 1 mode 1 cosc 8 current sense 4 current sense 3 current sense 1 current sense 2 ch4 h-bridge ch3 h-bridge ch6 h-bridge ch7 h-bridge osc clk 2 / in 3b cw 2 / in 4a mode 4 / in 4b fb 1 fil 1 fil 2 fb 2 mode 3 oe 1 mode 2 in 7b in 7a in 6a in 6b in 5a in 5b fil 3 fil 4 fb 3 fb 4 fb 7 fil 7 r 7 control and pre-driver cpu ch1 h-bridge ch2 h-bridge ch5 h-bridge m m ch1/ch2 control ch3/ch4 control 10 f 5 k ? x 2 5 k ? 1000 pf 1000 pf 100 pf 1000 pf 1000 pf tsd uvlo 200 mv v ref7 cautions 1. be sure to connect all of the pins which have more than one. 2. the constants shown in the above diagra m are provided as examples only. perform design based on thorough evaluation with the actual machine. data sheet s17486ej1v0ds 7 pd168117a 5. function operation table 5.1 power save function this ic can be placed in the power-save mode by making mode 1 , mode 2 , mode 3 , and mode 4 high level. this function allows holding of the excitation position wh en the stepping motor mode is selected and the operation to be started from where the excitation pos ition is held when the power-save mode is cleared. in the power-save mode, the current consumption is reduced to 20 a typ. because the internal circui ts other than uvlo are stopped. the operation modes of ch1 to ch4 can be set by a combination of mode 1 to mode 4 . for the combination of the mode pins, refer to table 5 ? 1. mode pin truth table . table 5 ? 1. mode pin truth table mode 1 mode 2 mode 3 mode 4 operation mode (/in 4b ) ch1, ch2 ch3, ch4 l l l in 4b input 2-phase excitation l l h 1-2 phase excitation l h l micro step general-purpose driving (current limiting) l h h l 2-phase excitation 2-phase excitation l h h h 1-2 phase excitation 1-2 phase excitation h l l l 2-phase excitation (current limiting) 2-phase excitation (current limiting) h l l h 1-2 phase excitation (current limiting) 1-2 phase excitation (current limiting) h l h l 2-phase excitation micro step h l h h 1-2 phase excitation micro step h h l l micro step 2-phase excitation h h l h micro step 1-2 phase excitation h h h l micro step micro step h h h h power save mode remark h: high level, l: low level data sheet s17486ej1v0ds 8 pd168117a 5.2 ch1, ch2 (dedicated to stepping motor) clk 1 cw 1 oe 1 operation mode l h pulse progress, cw mode l h pulse progress, cw mode h h pulse progress, ccw mode h h pulse progress, ccw mode x x l output hi-z ( the internal follows the above-mentioned mode of operation ) remark x: high level or low level, hi-z: high impedance 5.3 ch3, ch4 (selecting stepping motor, dc motor and coil driving) data sheet s17486ej1v0ds 9 pd168117a 5.4 ch5, ch6 in 5a /in 6a in 5b /in 6b out 5a /out 6a out 5b /out 6b operation mode l l z z stop l h l h reverse h l h l forward h h h h brake load on v m ab off off on gnd forward load off v m ab on on off gnd reverse load off v m ab off off off gnd stop load on v m ab on off off gnd brake data sheet s17486ej1v0ds 10 pd168117a 5.5 ch7 in 7a in 7b out 7a out 7b h-bridge output state q1 q2 q3 q4 l l z z off off off off l h l h off on on off (linear) (linear) h l h l on off off on (linear) (linear) h h h h on on off off q1 v m7 out 7a out 7b q2 q3 q4 ? + ? + 5.6 sel 7 pin the current that flows into ch7 can be changed by setting the sel 7 pin. sel 7 operation mode l weak excitation mode (current 2/3 of the normal setting flows.) h normal operation mode ( comparison operation with reference voltage ) data sheet s17486ej1v0ds 11 pd168117a 5.7 reference voltage settings the external setting mode, in which the reference voltage is input to v ref7 externally, and the internal setting mode, in which the internal reference voltage is used, can be switched using the selv ref7 pin. when using the external setting mode, the voltage which will become reference voltage must be applied to the v ref7 pin. the functions for the sel 7 pin will be enabled, regardless of the extern al/internal setting mode. the voltage (when external setting mode is set), and the 200 mv (when the in ternal setting mode is set) that are applied to the v ref7 pin are equivalent to normal operation mode (sel 7 = h). selv ref7 operation mode l external setting mode (voltage must be applied to v ref7 ) h internal setting mode (200 mv setting) 6. command input timing chart figure 6 ? 1. in the micro step mode cw mode cw mode ccw mode 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 14 13 12 11 10 9 8 7 6 2 13 4 5 6 7 8910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 clk pulse output chopping pulse internal reset signal (reset = l) cw oe reset state output hi-z output hi-z reset state remark the motor excitation output is equivalent to the pul se output. the excitation position of the motor is changed by the rising edge timing of the pulse output (equals the rising or falling edges of clk). data sheet s17486ej1v0ds 12 pd168117a 7. functional deployment 7.1 reset function this whole ic can be changed into a reset state by setting all of mode 1 to mode 4 to h, and all of in 5a , in 5b , in 6a , in 6b , in 7a , and in 7b to l. in the state of reset, an output will be in hi-z state, and since it stops operation of an internal circuit, it can make self-consumption current below 1 a. be sure to perform a reset operation. in the reset operation, the internal circuitry is stopped wh enever possible, so that the self current consumption can be reduced. when the external input signal is stopped, the current consumption can be lowered to 1 a max. immediately after release of reset, excitation is start ed from the position where the current of ch1 is 100% and the current of ch2 is 0%, in the micro st ep drive mode and 1-2 phase excitation drive mode. in the 2-phase excitation drive mode, excitation is started from the posi tion where the currents of ch1 and ch2 are 100%. 7.2 2-phase excitation drive mode and 1-2 phase excitation drive mode in the 2-phase excitation drive mode, current of 100% is allowed to flow into ch1 and ch2 simultaneously. in the 1- 2 phase excitation drive mode, the motor can be driven at a hi gher torque by allowing a current to flow so that the synthesized torque of ch1 and ch2 is the same as the torque at phase 1 position. the 2- phase excitation, 1-2 phase excitation, and micro step driving modes are selected by the mode 1 to mode 4 pins. note that 100% (= saturation drive mode) and a mode in which the current set by the sense resistor is used can be selected by the mode pin. current control is performed by chopping drive. 7.3 micro step drive mode of stepping motor the current flowing into the h-bridge is constant by using a vector value so that one period can be stopped in 1/128 steps. this function is provided to realize hi gh-accuracy positioning control of a stepping motor. to realize this micro step driving, the followi ng functions are internally realized by the driver. ? detection of current flowing into each ch annel by sense resistor as voltage value ? synthesizing half the dummy sine waveform generated by the internal d/a with pwm oscillation waveform for chopping operation ? driver stage performing pwm drive based on result of comparing detected vo ltage and synthesized waveform because the internal dummy sine wave consists of 128 st eps per period, it can be used to drive a stepping motor using 128 divisions. the micro step driv e mode, 2-phase excitation drive mode, and 1-2 phase excitation drive mode can be selected by using external pins. data sheet s17486ej1v0ds 13 pd168117a figure 7 ? 1. concept of micro step drive operation a m + 7.4 input signals (clk, oe and cw pins, stepping motor control methods) the motor is driven by the pulses input to the clk 1 (clk 2 ) pin. the pulses advance by one at the rising and falling edges of the clk 1 (clk 2 ) signal. when the clk 1 (clk 2 ) pin is fixed to low levels, the internal excita tion positions do not progress, regardless of the input status of the oe 1 (oe 2 ) pin. since 1 electrical angle cycle is divided by 128, it equals 1 electrical angle cycle because of the 64-clock input. since both edges are used for control, the pulse intervals t hat are output rely on the pulse duty which is input. it is suggested that pulses with a duty of 50% should be input. the rotational direction of the motor is set by cw 1 (cw 2 ). in cw mode, the current for ch2 (ch4) is output delayed by a 90o phase in relation to the current for ch1 (ch3). in ccw mode, the current for ch2 (c h4) is output advanced by a 90o phase in relation to the current for ch1 (ch3). 7.5 output enable (oe) pin the oe 1 (oe 2 ) pin can be used to forcibly stop pulse output of ch1 and ch2 (or ch3 and ch4). when oe 1 (oe 2 ) = l, the output is forcib ly made to go into hi-z. moreover, since an internal excitation position can make it go on also at oe 1 (oe 2 ) pin = l, an internal excitation position advances in inputting a pulse into clk 1 (clk 2 ) pin. the internal information will be held if oe 1 (oe 2 ) = l and clk 1 (clk 2 ) pin are fixed to low level. motor position information is memorized unless it is reset. in performing stepping moto r control, be sure to give as oe 1 (oe 2 ) = h. data sheet s17486ej1v0ds 14 pd168117a 7.6 current detection resistor connection (fb) pin (1) ch1 to ch4 the current detection resistor is c onnected when current driving is necessary. it is used for micro step driving and solenoid driving. the peak value (at 100% current of ch1 (ch3) or ch2 (ch4)) of output current is decided by the resistance r fb linked to fb 1 (fb 3 ) and fb 2 (fb 4 ). this ic contains the reference power supply v ref for current value comparison (500 mv typ.) in the internal, and performs t he drive which makes the current value acquired from r fb and v ref an output current peak value. the current that flows into the output is {500 mv (reference voltage) /fb pin resistance x 1000}. peak output current: i max (a) ? v ref (v) r fb ( ? ) x 1000 example) where fb = 4.7 k ? output current = 500 (mv) /4.7 (k ? ) x 1000 ? 106.4 (ma) this means constant current driving of about 106.4 ma. when current driving is not perfo rmed, connect the fb pin to gnd. (2) ch7 connect the current detection circuit bet ween the source of the driver low si de and gnd. because the circuit is configured to detect current directly, connect a detection resistor of low resistance (1 ? maximum). the current that flows into the output is {200 mv (reference voltage) /fb 7 pin resistance} (when sel 7 = h). output current: i max (a) ? v ref (v) r fb ( ? ) example) where fb 7 = 0.5 ? output current = 200 (mv) /0.5 ( ?) = 400 (ma) this means constant current driving of 400 ma. because only ch7 employs the linear drive mode and direct ly detects the output current, the current accuracy is determined only by the external resistor and the offset of the curr ent control amplifier. the above example shows (selv ref7 = h) using the internal reference vo ltage. when applying reference voltage externally, set selv ref7 to l, then apply voltage to the v ref7 pin. the output current can be calculated by transposing 200 mv in th e computational expression. data sheet s17486ej1v0ds 15 pd168117a 7.7 selecting 2-phase excita tion/micro step drive mode the 2-phase excitation, 1-2 phase excitation, or mi cro step drive mode can be se lected by using the mode 1 to mode 4 pins. refer to table 5 ? 1. mode pin truth table for details. immediately after release of reset, the ic is initializ ed. in the 1-2 phase excita tion and micro step drive mode, excitation is started from the position where the output current of ch1 (ch3) is 100% and output current of ch2 (ch4) is 0%. in the 2-phase excitation drive mode, excitation is st arted from the position where th e currents of both ch1 (ch3) and ch2 (ch4) are +100%. when the mode is changed from the micro step driving to the 2-phase excitation (or 1-2 phase excitation), the position of micro step is held until clk is input. when the rotation direction does not change, pulse output is started by the first clk input, the position is skipped to the 2-phase position of the next quadrant (or to the closest 1-2 phase position at the rotation direction destination), and driving is started. when the rotation direction changes, it is skipped to 2-ph ase position of the next quadr ant, or 1-2-phase position to the direction which changed, and a drive is started. figure 7 ? 2. concept of change operation, micro step driving ? 2-phase excitation (1-2 phase excitation) microstep stop position (example 1) microstep stop position (example 2) 2-phase excitation stop position skipes to the next quadrant (4) (3) (2) (1) 7.8 under-voltage lockout (uvlo) circuit this function is to forcibly stop the operati on of the ic to prevent malfunctioning if v dd drops. when uvlo operates, the ic is in the reset status. if v dd drops abruptly in the order of several s, this function may not operate. 7.9 overheat protection (tsd) circuit this function is to forcibly stop the operation of the ic to protect it from destruction du e to overheating if the chip temperature of the ic rises. the overheat protection circuit operates when the chip temperature rises to 150 c or more. when overheat is detected, all the circuits are stopped. when reset state or when uvlo is detec ted, the overheat protection circuit does not operate. 7.10 power up sequence this ic has a circuit that prevents current from flowing into the v m pin when v dd = 0 v. therefore, the current that flows into the v m pin is cut off 1 a max. when v dd = 0 v. data sheet s17486ej1v0ds 16 pd168117a 8. note on correct use 8.1 transmitting data data input at reset state is ignored. 8.2 pin processing of unused circuit the input/output pins of an unused circui t must be processed as specified below. a v m power supply pin is provided for each output circuit. the current consumption of the internal circuit can be reduced by dropping the v m power of the unused circuit to gnd. however, if there are multiple power supply pins, be sure to connect all of them to the same potential. data sheet s17486ej1v0ds 17 pd168117a 9. stepping motor driving waveform figure 9 ? 1. 2-phase excitation output mode figure 9 ? 2. 1-2 phase excitation output mode phase a current 100% 012345678 ? 100% 100% 012345678 ? 100% phase b current 100% 012345678 ? 100% 100% 012345678 ? 100% phase a current phase b current 70% of a current setting 70% of a current setting 70% of a current setting 70% of a current setting remark solid line: output duty 100% drive, dotted line: current control drive (the current is in accordance with the current setting.) data sheet s17486ej1v0ds 18 pd168117a figure 9 ? 3. micro step drive mode ? 99.5 99.5 ? 95.7 95.7 100 98.1 92.4 ? 92.4 ? 98.1 ? 100 ? 88.2 88.2 ? 83.1 83.1 ? 77.3 77.3 ? 70.7 70.7 ? 63.4 63.4 ? 55.6 55.6 ? 47.1 47.1 ? 38.3 38.3 ? 29.0 29.0 ? 19.5 19.5 ? 9.8 9.8 0 ch2 current ch1 current reset position 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 ? 99.5 99.5 ? 95.7 95.7 100 98.1 92.4 ? 92.4 ? 98.1 ? 100 ? 88.2 88.2 ? 83.1 83.1 ? 77.3 77.3 ? 70.7 70.7 ? 63.4 63.4 ? 55.6 55.6 ? 47.1 47.1 ? 38.3 38.3 ? 29.0 29.0 ? 19.5 19.5 ? 9.8 9.8 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 remark the horizontal axis of the above charts indicates the number of steps. the abo ve charts show an example in the cw (forward) mode. the current flowing into phases a and b is positive in the direction from out pin a to out pin b, and negative in the direction from out pin b to out pin a. because the micro step drive mode is in 128 steps, it equals 1 electrical angle cycle. data sheet s17486ej1v0ds 19 pd168117a 10. electrical specifications absolute maximum ratings (t a = 25 c, glass epoxy 4-layer board of 100 mm x 100 mm x 1.6 mm with copper foil area of 50%) parameter symbol condition rating unit power supply voltage v dd control block ? 0.5 to +6.0 v v m motor block ? 0.5 to +6.0 v input voltage v in ? 0.5 to v dd +0.5 v output pin voltage v out motor block 6.2 v dc output current (ch1 to 6ch) i d(dc) dc (during output independent operation) 0.4 a/ch dc output current (ch7) i d(dc) dc (during output independent operation) 0.5 a/ch instantaneous output current i d(pulse) pw < 10 ms, duty cycle 20% 0.7 a/ch (during output independent operation) power consumption p t 1.5 w peak junction temperature t ch(max) 150 c storage temperature t stg ? 55 to +150 c remark the overheat protection circuit operates at t ch > 150 c. when overheat is detec ted, all the circuits are stopped. the overheat protection circuit does not operate at reset or on detection of ulvo. caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the ab solute maximum ratings are rated valu es at which the product is on the verge of suffering physical damage , and therefore the product must be used under conditions that ensure that the absolute m aximum ratings are not exceeded. recommended operating conditions (t a = 25 c, glass epoxy 4-layer board of 100 mm x 100 mm x 1.6 mm with copper foil area of 50%) parameter symbol condition min. typ. max. unit power supply voltage v dd control block 2.7 3.6 v v m motor block 2.7 5.5 v input voltage v in 0 v dd v dc output current (ch1 to 6ch) i d(dc) dc (during output independent operation) ? 0.3 +0.3 a/ch dc output current (ch7) i d(dc) dc (during output independent operation) ? 0.4 +0.4 a/ch instantaneous output current i d(pulse) pw < 10 ms, duty cycle 20% ? 0.6 +0.6 a/ch (during output independent operation) capacitor capacitance cosc (during 300 khz typ. oscillation ) 100 pf ch7 reference voltage input range v ref7 0.1 0.7 v logic input frequency f in 150 khz operating temperature range t a ? 10 75 c data sheet s17486ej1v0ds 20 pd168117a figure 10 ? 1. ac timing waveform clk 6.7 s min. 0.1 s min. 0.1 s min. 0.1 s min. 0.1 s min. 0.1 s min. 0.1 s min. 2.0 s min. cw mode (including reset) 2.0 s min. ? ? electrical characteristics (u nless otherwise specified, t a = 25 c, v dd = 3.0 v, v m = 3.0 v) parameter symbol condition min. typ. max. unit v dd pin current in standby mode i dd(stb) during reset 1.0 a v dd pin current in during operation i dd(act) during non-reset 5.0 ma high-level input current i ih v in = v dd 1.0 a low-level input current i il v in = 0 v ? 1.0 a high-level input voltage v ih 0.7 x v dd v low-level input voltage v il 0.3 x v dd v cosc oscillation frequency f osc cosc = 150 pf 200 khz h-bridge on-state resistance r on i m = 0.3 a, sum of upper and lower stages (ch1 to ch4, and ch7) 1.0 1.5 ? r on56 i m = 0.3 a, sum of upper and lower stages (ch5 and ch6) 1.5 2.0 ? output leakage current note1 i m(off) per v m pin, all control pin: low level 1.0 a low-voltage detection voltage v dds 1.7 2.5 v internal reference voltage note2 v ref ch1 to ch4 450 500 550 mv v ref7 ch7, during selv ref7 = h 180 200 220 mv current detection ratio note2 i m = 0.1 a, with sense resistor of 5 k ? , ch1 to ch4 900 1000 1100 output turn-on time t on r l = 20 ? , ch1 to ch6 0.02 0.35 1.0 s output turn-off time t off 0.02 0.35 1.0 s notes 1. this ic has a circuit that prevent s current from flowing into the v m pin when v dd = 0 v. 2. the accuracy of the output current for ch1 to ch4 de pends upon the motor that is actually used, but the current fluctuations of the ic are determined by refer ence voltage and current detection ratios. assume that the total of the reference voltage v ref and current sense circuit errors are equal to 10%. data sheet s17486ej1v0ds 21 pd168117a 11. package drawing item dimensions d e w e a b x y y1 zd ze 6.00 0.10 6.00 0.10 0.08 0.10 0.20 0.725 0.725 0.20 0.91 0.07 0.65 0.35 0.05 p64fc-65-ba2 (unit:mm) s wb d e s wa y1 s s y index mark s b a a e zd s x bab m ? 4.80 4.80 8 7 6 5 4 3 2 1 a c b c d e f g h ze e d detail of c part detail of d part detail of e part 64-pin plastic flga (6x6) 60x r0.30 r0.375 0.60 0.60 0.75 0.60 0.60 0.60 0.75 0.60 0.60 0.75 0.60 b 0.45 0.75 (aperture of solder resist) (land pad) data sheet s17486ej1v0ds 22 pd168117a 12. recommended soldering conditions the pd168117a should be soldered and mounted under the following recommended conditions. for soldering methods and conditions other than thos e recommended below, contact an nec electronics sales representative. for technical information, see the following website. semiconductor device mount manual (http: //www.necel.com/pkg/e n/mount/index.html) type of surface mount device pd168117afc-ba2-e1-a note1 : 64-pin plastic flga (6 x 6) process conditions symbol infrared reflow package peak temperature: 260 c, time: 60 seconds max. (at 220 c or higher) , count: three times or less, exposure limit: 3 days note2 (after that, prebake at 125 c for 10 hours) , flux: rosin flux with low chlorine (0.2 wt% or below) recommended. data sheet s17486ej1v0ds 23 pd168117a 1 2 3 4 voltage application waveform at input pin waveform distortion due to input noise or a reflected wave may cause malfunction. if the input of the cmos device stays in the area between v il (max) and v ih (min) due to noise, etc., the device may malfunction. take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between v il (max) and v ih (min). handling of unused input pins unconnected cmos device inputs can be cause of malfunction. if an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd via a resistor if there is a possibility that it will be an output pin. all handling related to unused pins must be judged separately for each device and according to related specifications governing the device. precaution against esd a strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. environmental control must be adequate. when it is dry, a humidifier should be used. it is recommended to avoid using insulators that easily build up static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work benches and floors should be grounded. the operator should be grounded using a wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with mounted semiconductor devices. status before initialization power-on does not necessarily define the initial status of a mos device. immediately after the power source is turned on, devices with reset functions have not yet been initialized. hence, power-on does not guarantee output pin levels, i/o settings or contents of registers. a device is not initialized until the reset signal is received. a reset operation must be executed immediately after power-on for devices with reset functions. power on/off sequence in the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. when switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. the correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. input of signal during power off state do not input signals or an i/o pull-up power supply while the device is not powered. the current injection that results from input of such a signal or i/o pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. notes for cmos devices 5 6 pd168117a reference documents nec semiconductor device reliability/quality control system (c10983e) quality grades on nec se miconductor devices (c11531e) the information in this document is current as of may, 2005. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. (2) "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). ? ? ? ? ? ? m8e 02. 11-1 |
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